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Sheet目录3872

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169

XMEGA A [MANUAL]

8077I–AVR–11/2012

14.12.10 INTFLAGS – Interrupt Flag register

Bit 7:4 – CCxIF: Compare or Capture Channel x Interrupt Flag

The compare or capture interrupt flag (CCxIF) is set on a compare match or on an input capture event on the

corresponding CC channel.

For all modes of operation except for capture, the CCxIF will be set when a compare match occurs between the count

corresponding interrupt vector is executed.

For input capture operation, the CCxIF will be set if the corresponding compare buffer contains valid data (i.e., when

CCxBV is set). The flag will be cleared when the CCx register is read. Executing the interrupt vector in this mode of

operation will not clear the flag.

The flag can also be cleared by writing a one to its bit location.

The CCxIF can be used for requesting a DMA transfer. A DMA read or write access of the corresponding CCx or

CCxBUF will then clear the CCxIF and release the request.

Bit 3:2 – Reserved

These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero

when this register is written.

Bit 1 – ERRIF: Error Interrupt Flag

This flag is set on multiple occasions, depending on the mode of operation.

In the FRQ or PWM waveform generation mode of operation, ERRIF is set on a fault detect condition from the fault

protection feature in the AWeX extention. For timer/counters which do not have the AWeX extention available, this flag is

never set in FRQ or PWM waveform generation mode.

For capture operation, ERRIF is set if a buffer overflow occurs on any of the CC channels.

For event controlled QDEC operation, ERRIF is set when an incorrect index signal is given.

This flag is automatically cleared when the corresponding interrupt vector is executed. The flag can also be cleared by

writing a one to this location.

Bit 0 – OVFIF: Overflow/Underflow Interrupt Flag

This flag is set either on a TOP (overflow) or BOTTOM (underflow) condition, depending on the WGMODE setting.

OVFIF is automatically cleared when the corresponding interrupt vector is executed. The flag can also be cleared by

writing a one to its bit location.

OVFIF can also be used for requesting a DMA transfer. A DMA write access of CNT, PER, or PERBUF will then clear the

OVFIF bit.

Bit

76543210

+0x0C

CCDIF

CCCIF

CCBIF

CCAIF

–

ERRIF

OVFIF

Read/Write

R/W

Initial Value

00000000

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